summaryrefslogtreecommitdiff
path: root/rtl/uncore/uncore.sv
diff options
context:
space:
mode:
authorIan M. <ian@aptel.org>2026-09-25 22:17:07 +0000
committerIan M. <ian@aptel.org>2026-09-25 22:17:07 +0000
commit180e410baa026276bd79c202ac9d731f07681a00 (patch)
tree8eb9df6f0fe2c38ceace9b5dc1f1965176900cfb /rtl/uncore/uncore.sv
initial commit
Signed-off-by: Ian M. <ian@aptel.org>
Diffstat (limited to 'rtl/uncore/uncore.sv')
-rw-r--r--rtl/uncore/uncore.sv40
1 files changed, 40 insertions, 0 deletions
diff --git a/rtl/uncore/uncore.sv b/rtl/uncore/uncore.sv
new file mode 100644
index 0000000..f34577f
--- /dev/null
+++ b/rtl/uncore/uncore.sv
@@ -0,0 +1,40 @@
+//
+// Copyright (c) 2026, Apollo Telephone Laboratories.
+// Provided under the BSD-3 clause.
+//
+
+//
+// AT-LI02 uncore
+//
+// @refclk_i: Reference clock input from on-board VCO
+// @reset_ni: Active-low reset input
+// @dclk_o: Derieved clock output
+// @gclk_o: Global clock output
+// @greset_o: Active-high global reset output
+//
+module uncore (
+ input wire refclk_i,
+ input wire reset_ni,
+
+ output logic dclk_o,
+ output logic gclk_o,
+ output logic greset_o
+);
+ logic dclk;
+ logic gclk;
+ logic greset;
+
+ // North bridge
+ north_bridge uncore_north (
+ .refclk_i(refclk_i),
+ .reset_ni(reset_ni),
+ .dclk_o(dclk),
+ .gclk_o(gclk),
+ .greset_o(greset)
+ );
+
+ // Continuous assignments
+ assign greset_o = greset;
+ assign dclk_o = dclk;
+ assign gclk_o = gclk;
+endmodule