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-rw-r--r--rtl/cpu/cpu_core.sv32
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diff --git a/rtl/cpu/cpu_core.sv b/rtl/cpu/cpu_core.sv
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+//
+// Copyright (c) 2026, Apollo Telephone Laboratories.
+// Provided under the BSD-3 clause.
+//
+
+`include "bus/ari.svh"
+
+//
+// Represents a single processing element
+//
+// @clk_i: Clock input
+// @reset_i: Reset input
+// @imc_op_done_i: IMC operation done
+// @imc_req_o: IMC request output
+// @imc_ad_o: IMC address output
+//
+module cpu_core (
+ input wire clk_i,
+ input wire reset_i,
+ input wire imc_op_done_i,
+
+ output logic imc_req_o,
+ output logic [PMA_XLEN-1:0] imc_ad_o
+);
+ cpu_fetch fetch_unit (
+ .clk_i(clk_i),
+ .reset_i(reset_i),
+ .memop_done_i(imc_op_done_i),
+ .mem_req_o(imc_req_o),
+ .mem_ad_o(imc_ad_o)
+ );
+endmodule