1 files changed, 33 insertions, 0 deletions
diff --git a/tb/testbench.sv b/tb/testbench.sv
new file mode 100644
index 0000000..d290fde
--- /dev/null
+++ b/tb/testbench.sv
@@ -0,0 +1,33 @@
+//
+// Copyright (c) 2026, Apollo Telephone Laboratories.
+// Provided under the BSD-3 clause.
+//
+
+`timescale 1ns / 1ps
+
+module testbench;
+    logic clk = 0;
+    logic reset_n = 1;
+    logic pwr_good;
+
+    soc soc_dut (
+        .refclk_i(clk),
+        .reset_ni(reset_n),
+        .pwr_good_o(pwr_good)
+    );
+
+    always #1 clk = ~clk;
+    initial begin
+        // Assert chip-wide reset
+        #1 reset_n = 0;
+        #4 reset_n = 1;
+
+        #300;
+        $finish;
+    end
+
+    initial begin
+        $dumpfile("soc.vcd");
+        $dumpvars(0, testbench);
+    end
+endmodule