From 0dea2c7bc7bb5643aa3b48f2f1310a7a2828f3f9 Mon Sep 17 00:00:00 2001 From: "Ian M." Date: Sun, 27 Sep 2026 21:31:25 +0000 Subject: cpu: Add core and fetch unit groundwork Signed-off-by: Ian M. --- rtl/cpu/cpu_core.sv | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 rtl/cpu/cpu_core.sv (limited to 'rtl/cpu/cpu_core.sv') diff --git a/rtl/cpu/cpu_core.sv b/rtl/cpu/cpu_core.sv new file mode 100644 index 0000000..cad1f94 --- /dev/null +++ b/rtl/cpu/cpu_core.sv @@ -0,0 +1,32 @@ +// +// Copyright (c) 2026, Apollo Telephone Laboratories. +// Provided under the BSD-3 clause. +// + +`include "bus/ari.svh" + +// +// Represents a single processing element +// +// @clk_i: Clock input +// @reset_i: Reset input +// @imc_op_done_i: IMC operation done +// @imc_req_o: IMC request output +// @imc_ad_o: IMC address output +// +module cpu_core ( + input wire clk_i, + input wire reset_i, + input wire imc_op_done_i, + + output logic imc_req_o, + output logic [PMA_XLEN-1:0] imc_ad_o +); + cpu_fetch fetch_unit ( + .clk_i(clk_i), + .reset_i(reset_i), + .memop_done_i(imc_op_done_i), + .mem_req_o(imc_req_o), + .mem_ad_o(imc_ad_o) + ); +endmodule -- cgit v1.2.3