From 789c6304aa8ef6c4ed6049c3521cb32809b219ad Mon Sep 17 00:00:00 2001 From: "Ian M." Date: Sat, 26 Sep 2026 02:58:16 +0000 Subject: bus: ari: Implement ARI interconnect groundwork Signed-off-by: Ian M. --- rtl/soc.sv | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'rtl/soc.sv') diff --git a/rtl/soc.sv b/rtl/soc.sv index fb33093..f7953a3 100644 --- a/rtl/soc.sv +++ b/rtl/soc.sv @@ -3,6 +3,8 @@ // Provided under the BSD-3 clause. // +`include "bus/ari.svh" + // // The AT-LI02 System-on-Chip (SoC) package // @@ -16,19 +18,32 @@ module soc ( output logic pwr_good_o ); + AriFrame mb_r_tap[0:ARI_SEGMENT_COUNT-1]; logic dclk; logic gclk; logic greset; + genvar i; // Platform uncore uncore uc ( .refclk_i(refclk_i), .reset_ni(reset_ni), + .mb_r_tap_i(mb_r_tap), .dclk_o(dclk), .gclk_o(gclk), .greset_o(greset) ); + // + // Zero out currently unused segment taps so that there + // is no garbage put onto the bus. + // + generate + for (i = 0; i < ARI_SEGMENT_COUNT; i = i + 1) begin : bus_rst + assign mb_r_tap[i] = 0; + end + endgenerate + always_ff @(posedge dclk) begin if (greset) begin pwr_good_o <= 0; -- cgit v1.2.3