//
// Copyright (c) 2026, Apollo Telephone Laboratories.
// Provided under the BSD-3 clause.
//

//
// Represents a processor application domain
//
// @clk_i:          Input clock
// @reset_i:        Reset input
// @mb_r_tap<n>_o:  Mainbus request tap output
//
module cpu_appdom (
    input wire clk_i,
    input wire reset_i,

    output AriFrame mb_r_tap0_o
);
    // Lockstep domain 0
    cpu_lockdom lockdom0 (
        .clk_i(clk_i),
        .reset_i(reset_i),
        .mb_r_tap_o(mb_r_tap0_o)
    );
endmodule