rtl/bus/ari_mainbus.sv


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//
// Copyright (c) 2026, Apollo Telephone Laboratories.
// Provided under the BSD-3 clause.
//

`include "bus/ari.svh"

//
// On-chip mainbus
//
// @clk_i:    Clock input
// @reset_i:  Reset input
// @r_tap_i:  Request taps
//
module ari_mainbus (
    input wire clk_i,
    input wire reset_i,
    input AriFrame r_tap_i[0:ARI_SEGMENT_COUNT-1]
);
    // Request ring
    ari_ring req_ring (
        .clk_i(clk_i),
        .reset_i(reset_i),
        .tap_i(r_tap_i)
    );
endmodule